
shell:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400560 <_init>:
  400560:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400564:	910003fd 	mov	x29, sp
  400568:	9400003c 	bl	400658 <call_weak_fn>
  40056c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400570:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400580 <.plt>:
  400580:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400584:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf5b4>
  400588:	f947fe11 	ldr	x17, [x16, #4088]
  40058c:	913fe210 	add	x16, x16, #0xff8
  400590:	d61f0220 	br	x17
  400594:	d503201f 	nop
  400598:	d503201f 	nop
  40059c:	d503201f 	nop

00000000004005a0 <__libc_start_main@plt>:
  4005a0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4005a4:	f9400211 	ldr	x17, [x16]
  4005a8:	91000210 	add	x16, x16, #0x0
  4005ac:	d61f0220 	br	x17

00000000004005b0 <__gmon_start__@plt>:
  4005b0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4005b4:	f9400611 	ldr	x17, [x16, #8]
  4005b8:	91002210 	add	x16, x16, #0x8
  4005bc:	d61f0220 	br	x17

00000000004005c0 <abort@plt>:
  4005c0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4005c4:	f9400a11 	ldr	x17, [x16, #16]
  4005c8:	91004210 	add	x16, x16, #0x10
  4005cc:	d61f0220 	br	x17

00000000004005d0 <pow@plt>:
  4005d0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4005d4:	f9400e11 	ldr	x17, [x16, #24]
  4005d8:	91006210 	add	x16, x16, #0x18
  4005dc:	d61f0220 	br	x17

00000000004005e0 <__isoc99_scanf@plt>:
  4005e0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4005e4:	f9401211 	ldr	x17, [x16, #32]
  4005e8:	91008210 	add	x16, x16, #0x20
  4005ec:	d61f0220 	br	x17

00000000004005f0 <printf@plt>:
  4005f0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4005f4:	f9401611 	ldr	x17, [x16, #40]
  4005f8:	9100a210 	add	x16, x16, #0x28
  4005fc:	d61f0220 	br	x17

0000000000400600 <putchar@plt>:
  400600:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400604:	f9401a11 	ldr	x17, [x16, #48]
  400608:	9100c210 	add	x16, x16, #0x30
  40060c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400610 <_start>:
  400610:	d280001d 	mov	x29, #0x0                   	// #0
  400614:	d280001e 	mov	x30, #0x0                   	// #0
  400618:	aa0003e5 	mov	x5, x0
  40061c:	f94003e1 	ldr	x1, [sp]
  400620:	910023e2 	add	x2, sp, #0x8
  400624:	910003e6 	mov	x6, sp
  400628:	580000c0 	ldr	x0, 400640 <_start+0x30>
  40062c:	580000e3 	ldr	x3, 400648 <_start+0x38>
  400630:	58000104 	ldr	x4, 400650 <_start+0x40>
  400634:	97ffffdb 	bl	4005a0 <__libc_start_main@plt>
  400638:	97ffffe2 	bl	4005c0 <abort@plt>
  40063c:	00000000 	.inst	0x00000000 ; undefined
  400640:	004008ec 	.word	0x004008ec
  400644:	00000000 	.word	0x00000000
  400648:	00400990 	.word	0x00400990
  40064c:	00000000 	.word	0x00000000
  400650:	00400a10 	.word	0x00400a10
  400654:	00000000 	.word	0x00000000

0000000000400658 <call_weak_fn>:
  400658:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf5b4>
  40065c:	f947f000 	ldr	x0, [x0, #4064]
  400660:	b4000040 	cbz	x0, 400668 <call_weak_fn+0x10>
  400664:	17ffffd3 	b	4005b0 <__gmon_start__@plt>
  400668:	d65f03c0 	ret
  40066c:	00000000 	.inst	0x00000000 ; undefined

0000000000400670 <deregister_tm_clones>:
  400670:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400674:	91012000 	add	x0, x0, #0x48
  400678:	b0000081 	adrp	x1, 411000 <__libc_start_main@GLIBC_2.17>
  40067c:	91012021 	add	x1, x1, #0x48
  400680:	eb00003f 	cmp	x1, x0
  400684:	540000a0 	b.eq	400698 <deregister_tm_clones+0x28>  // b.none
  400688:	90000001 	adrp	x1, 400000 <_init-0x560>
  40068c:	f9451821 	ldr	x1, [x1, #2608]
  400690:	b4000041 	cbz	x1, 400698 <deregister_tm_clones+0x28>
  400694:	d61f0020 	br	x1
  400698:	d65f03c0 	ret
  40069c:	d503201f 	nop

00000000004006a0 <register_tm_clones>:
  4006a0:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4006a4:	91012000 	add	x0, x0, #0x48
  4006a8:	b0000081 	adrp	x1, 411000 <__libc_start_main@GLIBC_2.17>
  4006ac:	91012021 	add	x1, x1, #0x48
  4006b0:	cb000021 	sub	x1, x1, x0
  4006b4:	9343fc21 	asr	x1, x1, #3
  4006b8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4006bc:	9341fc21 	asr	x1, x1, #1
  4006c0:	b40000a1 	cbz	x1, 4006d4 <register_tm_clones+0x34>
  4006c4:	90000002 	adrp	x2, 400000 <_init-0x560>
  4006c8:	f9451c42 	ldr	x2, [x2, #2616]
  4006cc:	b4000042 	cbz	x2, 4006d4 <register_tm_clones+0x34>
  4006d0:	d61f0040 	br	x2
  4006d4:	d65f03c0 	ret

00000000004006d8 <__do_global_dtors_aux>:
  4006d8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4006dc:	910003fd 	mov	x29, sp
  4006e0:	f9000bf3 	str	x19, [sp, #16]
  4006e4:	b0000093 	adrp	x19, 411000 <__libc_start_main@GLIBC_2.17>
  4006e8:	39412260 	ldrb	w0, [x19, #72]
  4006ec:	35000080 	cbnz	w0, 4006fc <__do_global_dtors_aux+0x24>
  4006f0:	97ffffe0 	bl	400670 <deregister_tm_clones>
  4006f4:	52800020 	mov	w0, #0x1                   	// #1
  4006f8:	39012260 	strb	w0, [x19, #72]
  4006fc:	f9400bf3 	ldr	x19, [sp, #16]
  400700:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400704:	d65f03c0 	ret

0000000000400708 <frame_dummy>:
  400708:	17ffffe6 	b	4006a0 <register_tm_clones>

000000000040070c <shellInsert>:
  40070c:	d10083ff 	sub	sp, sp, #0x20
  400710:	f90007e0 	str	x0, [sp, #8]
  400714:	b90007e1 	str	w1, [sp, #4]
  400718:	b90003e2 	str	w2, [sp]
  40071c:	b94003e0 	ldr	w0, [sp]
  400720:	b9001fe0 	str	w0, [sp, #28]
  400724:	14000040 	b	400824 <shellInsert+0x118>
  400728:	b9801fe0 	ldrsw	x0, [sp, #28]
  40072c:	d37ef400 	lsl	x0, x0, #2
  400730:	f94007e1 	ldr	x1, [sp, #8]
  400734:	8b000020 	add	x0, x1, x0
  400738:	b9400000 	ldr	w0, [x0]
  40073c:	b90017e0 	str	w0, [sp, #20]
  400740:	b9401fe1 	ldr	w1, [sp, #28]
  400744:	b94003e0 	ldr	w0, [sp]
  400748:	4b000020 	sub	w0, w1, w0
  40074c:	b9001be0 	str	w0, [sp, #24]
  400750:	14000012 	b	400798 <shellInsert+0x8c>
  400754:	b9801be0 	ldrsw	x0, [sp, #24]
  400758:	d37ef400 	lsl	x0, x0, #2
  40075c:	f94007e1 	ldr	x1, [sp, #8]
  400760:	8b000021 	add	x1, x1, x0
  400764:	b9401be2 	ldr	w2, [sp, #24]
  400768:	b94003e0 	ldr	w0, [sp]
  40076c:	0b000040 	add	w0, w2, w0
  400770:	93407c00 	sxtw	x0, w0
  400774:	d37ef400 	lsl	x0, x0, #2
  400778:	f94007e2 	ldr	x2, [sp, #8]
  40077c:	8b000040 	add	x0, x2, x0
  400780:	b9400021 	ldr	w1, [x1]
  400784:	b9000001 	str	w1, [x0]
  400788:	b9401be1 	ldr	w1, [sp, #24]
  40078c:	b94003e0 	ldr	w0, [sp]
  400790:	4b000020 	sub	w0, w1, w0
  400794:	b9001be0 	str	w0, [sp, #24]
  400798:	b9401fe0 	ldr	w0, [sp, #28]
  40079c:	b94003e1 	ldr	w1, [sp]
  4007a0:	1ac10c02 	sdiv	w2, w0, w1
  4007a4:	b94003e1 	ldr	w1, [sp]
  4007a8:	1b017c41 	mul	w1, w2, w1
  4007ac:	4b010000 	sub	w0, w0, w1
  4007b0:	b9401be1 	ldr	w1, [sp, #24]
  4007b4:	6b00003f 	cmp	w1, w0
  4007b8:	5400012b 	b.lt	4007dc <shellInsert+0xd0>  // b.tstop
  4007bc:	b9801be0 	ldrsw	x0, [sp, #24]
  4007c0:	d37ef400 	lsl	x0, x0, #2
  4007c4:	f94007e1 	ldr	x1, [sp, #8]
  4007c8:	8b000020 	add	x0, x1, x0
  4007cc:	b9400000 	ldr	w0, [x0]
  4007d0:	b94017e1 	ldr	w1, [sp, #20]
  4007d4:	6b00003f 	cmp	w1, w0
  4007d8:	54fffbeb 	b.lt	400754 <shellInsert+0x48>  // b.tstop
  4007dc:	b9401fe1 	ldr	w1, [sp, #28]
  4007e0:	b94003e0 	ldr	w0, [sp]
  4007e4:	4b000020 	sub	w0, w1, w0
  4007e8:	b9401be1 	ldr	w1, [sp, #24]
  4007ec:	6b00003f 	cmp	w1, w0
  4007f0:	54000140 	b.eq	400818 <shellInsert+0x10c>  // b.none
  4007f4:	b9401be1 	ldr	w1, [sp, #24]
  4007f8:	b94003e0 	ldr	w0, [sp]
  4007fc:	0b000020 	add	w0, w1, w0
  400800:	93407c00 	sxtw	x0, w0
  400804:	d37ef400 	lsl	x0, x0, #2
  400808:	f94007e1 	ldr	x1, [sp, #8]
  40080c:	8b000020 	add	x0, x1, x0
  400810:	b94017e1 	ldr	w1, [sp, #20]
  400814:	b9000001 	str	w1, [x0]
  400818:	b9401fe0 	ldr	w0, [sp, #28]
  40081c:	11000400 	add	w0, w0, #0x1
  400820:	b9001fe0 	str	w0, [sp, #28]
  400824:	b9401fe1 	ldr	w1, [sp, #28]
  400828:	b94007e0 	ldr	w0, [sp, #4]
  40082c:	6b00003f 	cmp	w1, w0
  400830:	54fff7cb 	b.lt	400728 <shellInsert+0x1c>  // b.tstop
  400834:	d503201f 	nop
  400838:	910083ff 	add	sp, sp, #0x20
  40083c:	d65f03c0 	ret

0000000000400840 <dkHibbard>:
  400840:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400844:	910003fd 	mov	x29, sp
  400848:	b9001fa0 	str	w0, [x29, #28]
  40084c:	b9001ba1 	str	w1, [x29, #24]
  400850:	b9401fa1 	ldr	w1, [x29, #28]
  400854:	b9401ba0 	ldr	w0, [x29, #24]
  400858:	4b000020 	sub	w0, w1, w0
  40085c:	11000400 	add	w0, w0, #0x1
  400860:	1e620000 	scvtf	d0, w0
  400864:	1e604001 	fmov	d1, d0
  400868:	1e601000 	fmov	d0, #2.000000000000000000e+00
  40086c:	97ffff59 	bl	4005d0 <pow@plt>
  400870:	1e604001 	fmov	d1, d0
  400874:	1e6e1000 	fmov	d0, #1.000000000000000000e+00
  400878:	1e603820 	fsub	d0, d1, d0
  40087c:	1e780000 	fcvtzs	w0, d0
  400880:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400884:	d65f03c0 	ret

0000000000400888 <shellSort>:
  400888:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  40088c:	910003fd 	mov	x29, sp
  400890:	f9000fa0 	str	x0, [x29, #24]
  400894:	b90017a1 	str	w1, [x29, #20]
  400898:	b90013a2 	str	w2, [x29, #16]
  40089c:	52800020 	mov	w0, #0x1                   	// #1
  4008a0:	b9002fa0 	str	w0, [x29, #44]
  4008a4:	1400000b 	b	4008d0 <shellSort+0x48>
  4008a8:	b9402fa1 	ldr	w1, [x29, #44]
  4008ac:	b94013a0 	ldr	w0, [x29, #16]
  4008b0:	97ffffe4 	bl	400840 <dkHibbard>
  4008b4:	2a0003e2 	mov	w2, w0
  4008b8:	b94017a1 	ldr	w1, [x29, #20]
  4008bc:	f9400fa0 	ldr	x0, [x29, #24]
  4008c0:	97ffff93 	bl	40070c <shellInsert>
  4008c4:	b9402fa0 	ldr	w0, [x29, #44]
  4008c8:	11000400 	add	w0, w0, #0x1
  4008cc:	b9002fa0 	str	w0, [x29, #44]
  4008d0:	b9402fa1 	ldr	w1, [x29, #44]
  4008d4:	b94013a0 	ldr	w0, [x29, #16]
  4008d8:	6b00003f 	cmp	w1, w0
  4008dc:	54fffe6d 	b.le	4008a8 <shellSort+0x20>
  4008e0:	d503201f 	nop
  4008e4:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4008e8:	d65f03c0 	ret

00000000004008ec <main>:
  4008ec:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4008f0:	910003fd 	mov	x29, sp
  4008f4:	b9003fbf 	str	wzr, [x29, #60]
  4008f8:	1400000b 	b	400924 <main+0x38>
  4008fc:	910043a1 	add	x1, x29, #0x10
  400900:	b9803fa0 	ldrsw	x0, [x29, #60]
  400904:	d37ef400 	lsl	x0, x0, #2
  400908:	8b000021 	add	x1, x1, x0
  40090c:	90000000 	adrp	x0, 400000 <_init-0x560>
  400910:	91290000 	add	x0, x0, #0xa40
  400914:	97ffff33 	bl	4005e0 <__isoc99_scanf@plt>
  400918:	b9403fa0 	ldr	w0, [x29, #60]
  40091c:	11000400 	add	w0, w0, #0x1
  400920:	b9003fa0 	str	w0, [x29, #60]
  400924:	b9403fa0 	ldr	w0, [x29, #60]
  400928:	7100241f 	cmp	w0, #0x9
  40092c:	54fffe8d 	b.le	4008fc <main+0x10>
  400930:	910043a0 	add	x0, x29, #0x10
  400934:	52800062 	mov	w2, #0x3                   	// #3
  400938:	52800141 	mov	w1, #0xa                   	// #10
  40093c:	97ffffd3 	bl	400888 <shellSort>
  400940:	b9003fbf 	str	wzr, [x29, #60]
  400944:	1400000b 	b	400970 <main+0x84>
  400948:	b9803fa0 	ldrsw	x0, [x29, #60]
  40094c:	d37ef400 	lsl	x0, x0, #2
  400950:	910043a1 	add	x1, x29, #0x10
  400954:	b8606821 	ldr	w1, [x1, x0]
  400958:	90000000 	adrp	x0, 400000 <_init-0x560>
  40095c:	91292000 	add	x0, x0, #0xa48
  400960:	97ffff24 	bl	4005f0 <printf@plt>
  400964:	b9403fa0 	ldr	w0, [x29, #60]
  400968:	11000400 	add	w0, w0, #0x1
  40096c:	b9003fa0 	str	w0, [x29, #60]
  400970:	b9403fa0 	ldr	w0, [x29, #60]
  400974:	7100241f 	cmp	w0, #0x9
  400978:	54fffe8d 	b.le	400948 <main+0x5c>
  40097c:	52800140 	mov	w0, #0xa                   	// #10
  400980:	97ffff20 	bl	400600 <putchar@plt>
  400984:	d503201f 	nop
  400988:	a8c47bfd 	ldp	x29, x30, [sp], #64
  40098c:	d65f03c0 	ret

0000000000400990 <__libc_csu_init>:
  400990:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400994:	910003fd 	mov	x29, sp
  400998:	a901d7f4 	stp	x20, x21, [sp, #24]
  40099c:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf5b4>
  4009a0:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf5b4>
  4009a4:	91374294 	add	x20, x20, #0xdd0
  4009a8:	913722b5 	add	x21, x21, #0xdc8
  4009ac:	a902dff6 	stp	x22, x23, [sp, #40]
  4009b0:	cb150294 	sub	x20, x20, x21
  4009b4:	f9001ff8 	str	x24, [sp, #56]
  4009b8:	2a0003f6 	mov	w22, w0
  4009bc:	aa0103f7 	mov	x23, x1
  4009c0:	9343fe94 	asr	x20, x20, #3
  4009c4:	aa0203f8 	mov	x24, x2
  4009c8:	97fffee6 	bl	400560 <_init>
  4009cc:	b4000194 	cbz	x20, 4009fc <__libc_csu_init+0x6c>
  4009d0:	f9000bb3 	str	x19, [x29, #16]
  4009d4:	d2800013 	mov	x19, #0x0                   	// #0
  4009d8:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  4009dc:	aa1803e2 	mov	x2, x24
  4009e0:	aa1703e1 	mov	x1, x23
  4009e4:	2a1603e0 	mov	w0, w22
  4009e8:	91000673 	add	x19, x19, #0x1
  4009ec:	d63f0060 	blr	x3
  4009f0:	eb13029f 	cmp	x20, x19
  4009f4:	54ffff21 	b.ne	4009d8 <__libc_csu_init+0x48>  // b.any
  4009f8:	f9400bb3 	ldr	x19, [x29, #16]
  4009fc:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400a00:	a942dff6 	ldp	x22, x23, [sp, #40]
  400a04:	f9401ff8 	ldr	x24, [sp, #56]
  400a08:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400a0c:	d65f03c0 	ret

0000000000400a10 <__libc_csu_fini>:
  400a10:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400a14 <_fini>:
  400a14:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400a18:	910003fd 	mov	x29, sp
  400a1c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400a20:	d65f03c0 	ret
